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PDF V826516K04S Data sheet ( Hoja de datos )
| Número de pieza | V826516K04S | |
| Descripción | 2.5 VOLT 16M x 64 HIGH PERFORMANCE UNBUFFERED DDR SDRAM MODULE | |
| Fabricantes | Mosel Vitelic Corp | |
| Logotipo |  |
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MOSEL VITELIC
V826516K04S
2.5 VOLT 16M x 64 HIGH PERFORMANCE
UNBUFFERED DDR SDRAM MODULE
PRELIMINARY
Features
■ 184 Pin Unbuffered 16,777,216 x 64 bit
Organization DDR SDRAM Modules
■ Utilizes High Performance 16M x 8 DDR
SDRAM in TSOPII-66 Packages
■ Single +2.5V (± 0.2V) Power Supply
■ Programmable CAS Latency, Burst Length, and
Wrap Sequence (Sequential & Interleave)
■ Auto Refresh (CBR) and Self Refresh
■ All Inputs, Outputs are SSTL-2 Compatible
■ 4096 Refresh Cycles every 64 ms
■ Serial Presence Detect (SPD)
■ DDR SDRAM Performance
Component Used B1 B0 A1 Units
tCK Clock Frequency 143 133 125 MHz
(max.)
(PC266A) (PC266B) (PC200)
tAC Clock Cycle Time
7
7.5
8 ns
CAS Latency = 2.5
Description
The V826516K04S memory module is organized
16,777,216 x 64 bits in a 184 pin memory module.
The 16M x 64 memory module uses 8 Mosel-Vitelic
16M x 8 DDR SDRAM. The x64 modules are ideal
for use in high performance computer systems
where increased memory density and fast access
times are required.
V826516K04S Rev. 1.1 March 2002
1
1 page  
MOSEL VITELIC
V826516K04S
Serial Presence Detect Information (cont.)
Function Supported
Hex value
Byte #
Function described
A1 B0 B1 A1 B0 B1
29 Minimum RAS to CAS delay(=tRCD)
30 Minimum active to precharge time(=tRAS)
31 Module ROW density
20ns 20ns 18ns 50h 50h 48h
50ns 45ns 45ns 32h 2Dh 2Dh
128MB
20h
32 Command and address signal input setup time
1.1ns 0.9ns 0.9ns B0h 90h 90h
33 Command and address signal input hold time
1.1ns 0.9ns 0.9ns B0h 90h 90h
34 Data signal input setup time
0.6ns 0.5ns 0.5ns 60h 50h 50h
35 Data signal input hold time
0.6ns 0.5ns 0.5ns 60h 50h 50h
36-40 Superset information (may be used in future)
- 00h
41 SDRAM device minimum active to active/auto-refresh time
(=tRC)
70ns 65ns 60ns 46h 41h 3Ch
42 SDRAM device minimum active to autorefresh to active/auto-refresh 80ns 75ns 67ns 50h 4Bh 43h
time (=tRFC)
43 SDRAM device maximum device cycle time (=tCK MAX)
12ns 12ns 12ns 30h 30h 30h
44 SDRAM device maximum skew between DQS and DQ signals
(=tDQSQ)
0.6ns 0.5ns 0.5ns 3Ch 32h 32h
45 SDRAM device maximum read datahold skew factor (=tQHS)
1ns 0.75ns 0.75ns A0h 75h 75h
46-61 Superset information (may be used in future)
- 00h
62 SPD data revision code
Initial release
00h
63 Checksum for Bytes 0 ~ 62
- C4h 0Ah A9h
64 Manufacturer JEDEC ID code
Mosel Vitelic
40h
65 -71 ....... Manufacturer JEDEC ID code
Mosel Vitelic
40h
72 Manufacturing location
01h
73-90 Module part number (ASCII)
V826516K04S
91 Manufacturer revison code (For PCB)
0 00
92 Manufacturer revison code (For component)
0 00
93 Manufacturing date (Week)
--
94 Manufacturing date (Year)
--
95~98 Assembly serial #
--
99~127 Manufacturer specific data (may be used in future)
Undefined
00h
128~255 Open for customer use
Undefined
00h
V826516K04S Rev.1.1 March 2002
5
5 Page 
MOSEL VITELIC
Package Dimensions
1.25 ± 0.006
(31.75 ±0.15)
5.25 ± 0.006
(133.350 ± 0.15)
5.077
(128.950)
V826516K04S
Units: Inches (Millimeters)
0.089
(2.26)
i
AB
2.55
(64.77)
1.95
(49.53)
2.500
0.10 M C B A
0.098 Max
(2.47 Max)
0.26
(6.62)
0.250
(6.350)
2.175
0.071
(1.80)
Detail A
0.157
(4.00)
0.1496
(3.80)
Tolerances : ± 0.005(.13) unless otherwise specified.
The used device is 8Mx16 SDRAM, TSOP.
SDRAM Part NO : K4H281638B-TC
0.050 ± 0.0039
(1.270 ±0.10)
0.039 ±0.002
(1.000 ±0.050)
0.0078 ±0.006
(0.20 ±0.15)
0.118
(3.00)
0.0787
(2.00)
0.050
(1.270)
Detail B
0.1575
(4.00)
0.10 M C A M B
V826516K04S Rev.1.1 March 2002
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet V826516K04S.PDF ] | |
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