파트넘버.co.kr ICS83905AMLFT 데이터시트 PDF


ICS83905AMLFT 반도체 회로 부품 판매점

LOW SKEW/ 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER



Integrated Circuit Systems 로고
Integrated Circuit Systems
ICS83905AMLFT 데이터시트, 핀배열, 회로
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS83905
LOW SKEW, 1:6 CRYSTAL INTERFACE-TO-
LVCMOS / LVTTL FANOUT BUFFER
GENERAL DESCRIPTION
ICS
The ICS83905 is a low skew, 1-to-6 LVCMOS /
LVTTL Fanout Buffer and a member of the
HiPerClockS™ HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS83905 single ended
clock input accepts LVCMOS or LVTTL input lev-
els. The low impedance LVCMOS/LVTTL outputs are designed
to drive 50series or parallel terminated transmission lines.
The effective fanout can be increased from 6 to 12 by utilizing
the ability of the outputs to drive two series terminated lines.
The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply mode. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS83905 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
FEATURES
6 LVCMOS / LVTTL outputs
Crystal oscillator interface
Output frequency range: 10MHz to 50MHz
Crystal input frequency range: 10MHz to 50MHz
Output skew: 10ps (typical)
5V tolerant enable inputs
Synchronous output enables
Operating supply modes: Full 3.3V, 2.5V and 1.8V,
mixed 3.3Vcore/2.5V or1.8V operating supply, and
mixed 2.5V core/1.8V operating supply
0°C to 70°C ambient operating temperature
Lead-Free package fully RoHS compliant
Pin compatible to MPC905
Industrial version available upon request
BLOCK DIAGRAM
PIN ASSIGNMENT
XTAL_IN
XTAL_OUT
ENABLE 1
ENABLE 2
SYNCHRONIZE
SYNCHRONIZE
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDo
BCLK1
GND
BCLK2
1
2
3
4
5
6
7
8
16 XTAL_IN
15 ENABLE 1
14 BCLK5
1 3 VDDO
12 BCLK4
11 GND
10 BCLK3
9 VDD
ICS83905
16-Lead SOIC
3.9mm x 9.9mm x 1.38mm body package
M Pacakge
Top View
ICS83905
16-Lead TSSOP
4.4mm x 3.0mm x 0.92mm body package
G Pacakge
Top View
GND
GND
BCLK0
VDDO
BCLK1
20 19 18 17 16
1 ICS83905 15
2 20-Lead VFQFN 14
3
4mm x 4mm x 0.9mm
body package 13
4 K Package 12
5 Top View 11
6 7 8 9 10
BCLK5
VDDO
BCLK4
GND
GND
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
83905AM
http://www.icst.com/products/hiperclocks.html
REV. A JANUARY 20, 2005
1


ICS83905AMLFT 데이터시트, 핀배열, 회로
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS83905
LOW SKEW, 1:6 CRYSTAL INTERFACE-TO-
LVCMOS / LVTTL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
Name
XTAL_OUT
XTAL_IN
ENABLE 1, ENABLE2
BCLK0, BCLK1, BCLK2,
BCLK3, BCLK4, BCLK5
GND
VDD
VDDO
n/c
Type
Output
Input
Input
Output
Power
Power
Power
Unused
Description
Crystal oscillator interface. XTAL_OUT is the output.
Crystal oscillator interface. XTAL_IN is the input.
Output enable. LVCMOS / LVTTL interface levels.
Clock outputs. LVCMOS / LVTTL interface levels.
Power supply ground.
Core supply pin.
Output supply pin.
No connect.
TABLE 2. PIN CHARACTERISTICS
Symbol
CIN
Parameter
Input Capacitance
CPD
Power Dissipation Capacitance
(per output)
ROUT
Output Impedance
Test Conditions
VDDO = 3.465V
VDDO = 2.625V
VDDO = 2V
VDDO = 3.3V ± 5%
VDDO = 2.5V ± 5%
VDDO = 1.8V ± 0.2V
Minimum
5
Typical
4
7
7
10
Maximum
19
18
16
12
Units
pF
pF
pF
pF
TABLE 3. OUTPUT ENABLE AND CLOCK ENABLE FUNCTION TABLE
Control Inputs
ENABLE 1 ENABLE 2
00
01
10
11
Outputs
BCLK0:BCLK4
BCLK5
LOW
LOW
LOW
Toggling
Toggling
LOW
Toggling
Toggling
83905AM
http://www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 20, 2005




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LOW SKEW/ 1:6 CRYSTAL INTERFACE-TOLVCMOS / LVTTL FANOUT BUFFER - Integrated Circuit Systems