74AHC1G07 반도체 회로 부품 판매점

Buffer with open-drain output



NXP Semiconductors 로고
NXP Semiconductors
74AHC1G07 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
74AHC1G07; 74AHCT1G07
Buffer with open-drain output
Product specification
File under Integrated Circuits, IC06
2000 May 02

74AHC1G07 데이터시트, 핀배열, 회로
Philips Semiconductors
Buffer with open-drain output
Product specification
74AHC1G07;
74AHCT1G07
FEATURES
High noise immunity
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Low power dissipation
SOT353 package
Output capability standard (open drain).
DESCRIPTION
The 74AHC1G/AHCT1G07 is a high-speed Si-gate CMOS
device.
The 74AHC1G/AHCT1G07 provides the non-inverting
buffer.
The output of the 74AHC1G/AHCT1G07 devices is an
open drain and can be connected to other open-drain
outputs to implement active-LOW wired-OR or
active-HIGH wired-AND functions. For digital operation
this device must have a pull-up resistor to establish a logic
HIGH-level.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf 3.0 ns.
SYMBOL
PARAMETER
tPZL propagation delay inA to outY
tPLZ propagation delay inA to outY
CI input capacitance
CPD power dissipation capacitance
CONDITIONS
CL = 15 pF; VCC = 5 V
CL = 15 pF; VCC = 5 V
CL = 50 pF; f = 1 MHz;
notes 1 and 2
TYPICAL
AHC1G
2.5
4.2
1.5
5.0
AHCT1G
2.8
3.9
1.5
6.5
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
UNIT
ns
ns
pF
pF
FUNCTION TABLE
See note 1.
INPUT
inA
L
H
Note
1. H = HIGH voltage level;
L = LOW voltage level;
Z = high impedance OFF-state.
OUTPUT
outY
L
Z
2000 May 02
2




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74AHC1G07 buffer

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