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PDF 74ACT16244TTR Data sheet ( Hoja de datos )
| Número de pieza | 74ACT16244TTR | |
| Descripción | 16-BIT BUS BUFFER WITH 3 STATE OUTPUTS NON INVERTED | |
| Fabricantes | STMicroelectronics | |
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® 74ACT16244
16-BIT BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
s HIGH SPEED: tPD = 4.8 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 8 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT16244 is an advanced CMOS 16-BIT
BUS BUFFER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
G output control governs four BUS BUFFERs.
The device is designed to be used with 3-state
memory address drivers, clock drivers, and
bus-oriented receivers and transmitters. The
device can be used as four 4-bit buffers, two 8-bit
buffers, or one 16-bit buffer.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
TSSOP
PACKAGE
TSSOP
ORDER CODES
T UB E
T&R
74ACT16244TTR
PIN CONNECTION
February 2000
1/8
1 page  
74ACT16244
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symb ol
Parameter
tPLH Propagation Delay Time
tPHL
tPZL Output Enable Time
tPZH
tPLZ Output Disable Time
tPHZ
(*) Voltage range is 5V ± 0.5V
T est Con ditio n
VCC
(V)
5.0(*)
5.0(*)
5.0(*)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
2.0 3.3 5.0 2.0 6.0
3.0 4.8 6.5 3.0 8.0
4.0 6.5 8.7 4.0 9.7
3.0 5.5 7.7 3.0 8.8
4.0 6.0 8.0 4.0 9.2
3.0 4.6 6.4 3.0 7.3
Unit
ns
ns
ns
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
VCC
(V)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
3.6 pF
COUT Output Capacitance
5.0
11 pF
CPD Power Dissipation
Capacitance (note 1)
5.0
42 pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/16 (per circuit)
TEST CIRCUIT
TEST
tPLH, tPHL
tPZL, tPLZ
tPZH, tPHZ
CL = 50 pF or equivalent (includes jigand probe capacitance)
RL = R1 = 500Ω orequivalent
RT = ZOUT of pulse generator (typically 50Ω)
SW IT CH
Open
2VCC
GND
5/8
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| PDF Descargar | [ Datasheet 74ACT16244TTR.PDF ] | |
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