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PL138-48 반도체 회로 부품 판매점

1:4 Differential PECL Fanout Buffer



Microchip 로고
Microchip
PL138-48 데이터시트, 핀배열, 회로
PL138-48
2.5V to 3.3V, Low-Skew, 1:4 Differential PECL Fanout Buffer
Features
• Four Differential 2.5V/3.3V LVPECL Output Pairs
• Output Frequency: 800 MHz
• Two Selectable Differential Input Pairs
• Translates Any Standard Single-Ended or
Differential Input Format to LVPECL Output. It
Can Accept the Following Standard Input Formats
and More:
- LVPECL, LVCMOS, LVDS, HCSL, SSTL,
LVHSTL, CML
• Output Skew: 25 ps (typ.)
• Part-to-Part Skew: 140 ps (typ.)
• Propagation Delay: 1.5 ns (typ.)
• Additive Jitter: <100 fs (max.)
• Operating Supply Voltage: 2.375V ~ 3.63V
• Operating Temperature Range from –40°C to
+85°C
• Package Availability: 16-Pin QFN and 20-Pin
TSSOP
General Description
The PL138-48 is a high performance low-cost 1:4
outputs differential LVPECL fanout buffer.
Microchip’s family of differential LVPECL buffers are
designed to operate from a single power supply of 2.5V
±5% or 3.3V ±10%. The differential input pairs are
designed to accept most standard input signal levels,
using an appropriate resistor bias network, and
produce a high quality set of outputs with the lowest
possible skew on the outputs, which is guaranteed for
part-to-part or lot-to-lot skew.
Designed to fit in a small form-factor package, the
PL138-48 offers up to 800 MHz of output operation with
very low-power consumption and lowest additive jitter
of any comparable device.
Block Diagram
2016 Microchip Technology Inc.
DS20005543B-page 1


PL138-48 데이터시트, 핀배열, 회로
PL138-48
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage (VDD) ...............................................................................................................................................+4.6V
Input Voltage, DC (VI)..........................................................................................................................–0.5V to VDD+0.5V
Output Voltage, DC (VO) .....................................................................................................................–0.5V to VDD+0.5V
ESD Protection (HBM) ...............................................................................................................................................2 kV
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Specifications: VCC = 3.3V; VEE = 0V. Input and output parameters vary 1:1 with VCC when VCC varies ±10%.
Parameters
Symbol
Min.
Typ.
Max.
Units
Conditions
2.215 2.320 2.420
At –40°C
Output High Voltage, (Note 1) VOH
2.275
2.275
2.350
2.350
2.420
2.420
V At +25°C
At +85°C
1.470 1.610 1.745
At –40°C
Output Voltage Low, (Note 1)
VOL
1.490
1.490
1.585
1.585
1.680
1.680
V At +25°C
At +85°C
2.075
— 2.420
At –40°C
Input High Voltage
VIH
2.135
— 2.420
V At +25°C
2.135
— 2.420
At +85°C
1.470
— 1.890
At –40°C
Input Low Voltage
VIL
1.490
— 1.825
V At +25°C
1.490
— 1.825
At +85°C
1.86 — 1.98
At –40°C
Output Voltage Reference,
(Note 2)
VBB
1.92
— 2.04
V At +25°C
1.92 — 2.04
At +85°C
Input High Voltage Common
Mode Range, (Note 3, Note 4)
VCMR
1.2
1.2
1.2
— 3.3
— 3.3
— 3.3
At –40°C
V At +25°C
At +85°C
— — 75
At –40°C
Input High Current, (Note 5)
IIH
— — 75 µA At +25°C
— — 75
At +85°C
–75 — —
At –40°C
Input Low Current, (Note 5)
IIL
–75 — — µA At +25°C
–75 — —
At +85°C
Note 1:
2:
3:
4:
5:
Outputs terminated with 50to VCCO–2V.
Single-ended input operation is limited to VCC 3V in LVPECL mode.
Common mode voltage is defined as VIH.
For single-ended applications, the maximum input voltage for CLK-INx, CLK-INxB is VCC+0.3V.
CLK-IN0, CLK-IN1; CLK-IN0B, CLK-IN1B.
DS20005543B-page 2
2016 Microchip Technology Inc.




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1:4 Differential PECL Fanout Buffer - Microchip