|
|
Número de pieza | 853S011B | |
Descripción | LVPECL/ ECL Fanout Buffer | |
Fabricantes | IDT | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de 853S011B (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
No Preview Available ! Low Skew, 1-to-2, Differential-to-2.5V, 3.3V
LVPECL/ ECL Fanout Buffer
853S011B
Datasheet
General Description
The 853S011B is a low skew, high performance 1-to-2
Differential-to-2.5V/3.3V LVPECL/ECL Fanout Buffer. The
853S011B is characterized to operate from either a 2.5V or a 3.3V
power supply. Guaranteed output and part-to-part skew
characteristics make the 853S011B ideal for those clock distribution
applications demanding well defined performance and repeatability.
Features
• Two differential 2.5V, 3.3V LVPECL/ECL outputs
• One differential PCLK, nPCLK input pair
• PCLK, nPCLK pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: >2.5GHz
• Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nPCLK input
• Output skew: 5ps (typical)
• Part-to-part skew: 130ps (maximum)
• Propagation delay: 355ps (maximum)
• LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.8V, VEE = 0V
• ECL mode operating voltage supply range:
VCC = 0V, VEE = -3.8V to -2.375V
• -40°C to 85°C ambient operating temperature
• Available lead-free (RoHS 6) package
Block Diagram
PCLK Pulldown
nPCLK Pullup/Pulldown
Q0
nQ0
Q1
nQ1
©2016 Integrated Device Technology, Inc.
Pin Assignment
Q0 1
nQ0 2
Q1 3
nQ1 4
8 VCC
7 PCLK
6 nPCLK
5 VEE
853S011B
8-Lead SOIC, 150MIL
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
8-Lead TSSOP, 118MIL
3.0mm x 3.0mm x 0.97mm package body
G Package
Top View
1 Revision B, February 23, 2016
1 page 853S011B Datasheet
Table 3D. ECL DC Characteristics, VCC = 0V; VEE = -3.8V to -2.375V, TA = -40°C to 85°C
-40°C
25°C
85°C
Symbol Parameter
Min
Typ Max
Min
Typ Max Min
Typ Max Units
VOH
VOL
VPP
VCMR
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Input Voltage
Input High Voltage Common
Mode Range; NOTE 2
-1.055
-1.920
150
VEE+1.2
-0.950 -0.850
-1.780 -1.640
800 1200
-1.035
-1.885
150
-0.960 -0.885
-1.790 -1.695
800 1200
-1.055
-1.895
150
-0.980 0.905
-1.800 -1.705
800 1200
0 VEE+1.2
0 VEE+1.2
0
V
V
mV
V
IIH
Input
High Current
PCLK, nPCLK
200 200 200 µA
IIL
Input
PCLK
Low Current nPCLK
-10
-200
-10
-200
-10
-200
µA
µA
NOTE: Input and output parameters vary 1:1 with VCC. VEE can vary +0.925V to -0.5V.
NOTE 1: Outputs terminated with 50 to VCCO – 2V.
NOTE 2: Common mode voltage is defined as VIH.
©2016 Integrated Device Technology, Inc.
5
Revision B, February 23, 2016
5 Page 853S011B Datasheet
LVPECL Clock Input Interface
The PCLK /nPCLK accepts LVPECL, LVDS, CML, SSTL and other
differential signals. Both VSWING and VOH must meet the VPP and
VCMR input requirements. Figures 2A to 2F show interface examples
for the PCLK/nPCLK input driven by the most common driver types.
The input interfaces suggested here are examples only. If the driver
is from another vendor, use their termination recommendation.
Please consult with the vendor of the driver component to confirm the
driver termination requirements.
3.3V
CML
Zo = 50Ω
Zo = 50Ω
3.3V
R1 R2
50Ω 50Ω
3.3V
PCLK
nPCLK
LVPECL
Input
Figure 2A. PCLK/nPCLK Input
Driven by a CML Driver
3.3V
LVPECL
Zo = 50Ω
Zo = 50Ω
3.3V
R3
125Ω
R4
125Ω
3.3V
PCLK
nPCLK
LVPECL
R1 R2
84Ω 84Ω
Input
3.3V
CML Built-In Pullup
Zo = 50Ω
Zo = 50Ω
3.3V
R1
100Ω
PCLK
nPCLK
LVPECL
Input
Figure 2B. PCLK/nPCLK Input
Driven by a Built-In Pullup CML Driver
3.3V
3.3V LVPECL
Zo = 50Ω
Zo = 50Ω
R5 R6
100Ω - 200Ω 100Ω - 200Ω
3.3V
C1
PCLK
C2 VBB
nPCLK
LVPECL
R1 R2
50Ω 50Ω
Input
Figure 2C. PCLK/nPCLK Input
Driven by a 3.3V LVPECL Driver
2.5V
SSTL
Zo = 60Ω
Zo = 60Ω
2.5V
R3 R4
120 120
3.3V
PCLK
R1 R2
120 120
nPCLK
LVPECL
Input
Figure 2E. PCLK/nPCLK Input
Driven by an SSTL Driver
Figure 2D. PCLK/nPCLK Input Driven by
a 3.3V LVPECL Driver with AC Couple
3.3V
Zo = 50Ω
LVDS
Zo = 50Ω
R5
100Ω
3.3V
C1
C2
R1 R2
1k 1k
PCLK
VBB
nPCLK
LVPECL
Input
C3
0.1µF
Figure 2F. PCLK/nPCLK Input Driven by
a 3.3V LVDS Driver
©2016 Integrated Device Technology, Inc.
11
Revision B, February 23, 2016
11 Page |
Páginas | Total 20 Páginas | |
PDF Descargar | [ Datasheet 853S011B.PDF ] |
Número de pieza | Descripción | Fabricantes |
853S011B | LVPECL/ ECL Fanout Buffer | IDT |
Número de pieza | Descripción | Fabricantes |
SLA6805M | High Voltage 3 phase Motor Driver IC. |
Sanken |
SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |