|
|
PDF 9DBV0731 Data sheet ( Hoja de datos )
| Número de pieza | 9DBV0731 | |
| Descripción | 7-output 1.8V HCSL Fanout Buffer | |
| Fabricantes | IDT | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 9DBV0731 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
7-output 1.8V HCSL Fanout Buffer
9DBV0731
DATASHEET
Description
The 9DBV0731 is a member of IDT's Full-Featured PCIe
family. The device has 7 output enables for clock
management, and 3 selectable SMBus addresses.
Recommended Application
PCIe Gen1-3 clock distribution in Storage, Networking,
Compute, Consumer
Output Features
• 7 - 1-200MHz Low-Power (LP) HCSL DIF pairs
• Easy AC-coupling to other logic families, see IDT
application note AN-891
Key Specifications
• Additive cycle-to-cycle jitter <5ps
• Output-to-output skew < 60ps
• Additive phase jitter is <100fs RMS for PCIe Gen3
• Additive phase jitter <300fs rms (12kHz-20MHz @125MHz)
Block Diagram
vOE(6:0)#
7
CLK_IN
CLK_IN#
vSADR
^CKPWRGD_PD#
SDATA_3.3
SCLK_3.3
CONTROL
LOGIC
Features/Benefits
• LP-HCSL outputs; saves 14resistors and 24mm2 compared
to standard HCSL
• 41mW typical power consumption; elminates thermal
concerns
• Outputs can optionally be supplied from any voltage
between 1.05V and 1.8V; maximum power savings
• OE# pin for each output; support DIF power management
• HCSL-compatible differential input; can be driven by
common clock sources
• SMBus-selectable features allow optimization to customer
requirements
• Slew rate for each output; allows tuning for various line
lengths
• Differential output amplitude; allows tuning for various
application environments
• 1MHz to 200MHz operating frequency
• 3.3V tolerant SMBus interface works with legacy controllers
• Selectable SMBus addresses; multiple devices can easily
share an SMBus segment
• Device contains default configuration; SMBus interface not
required for device operation
• Space saving 40-pin 5x5mm VFQFPN; minimal board
space
` DIF6
DIF5
DIF4
DIF3
DIF2
DIF1
DIF0
9DBV0731 REVISION D 03/28/16 1 ©2016 Integrated Device Technology, Inc.
1 page  
9DBV0731 DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 9DBV0731. These ratings, which are standard
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
PARAMETER
SYMBOL
CONDITIONS
Supply Voltage
VDDx
Applies to VDD, VDDA and VDDIO
Input Voltage
VIN
Input High Voltage, SMBus VIHSMB
Storage Temperature
Ts
SMBus clock and data pins
Junction Temperature
Tj
Input ESD protection ESD prot
Human Body Model
1Guaranteed by design and characterization, not 100% tested in production.
2 Operation under these conditions is neither implied nor guaranteed.
3 Not to exceed 2.5V.
MIN
-0.5
-0.5
-65
2000
TYP
MAX
2.5
VDD+0.5
3.3
150
125
UNITS NOTES
V 1,2
V 1,3
V1
°C 1
°C 1
V1
Electrical Characteristics–Clock Input Parameters
TA = TCOM or TIND; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN TYP
Input Crossover Voltage -
DIF_IN
Input Swing - DIF_IN
Input Slew Rate - DIF_IN
VCROSS
VSWING
dv/dt
Cross Over Voltage
Differential value
Measured differentially
150
300
0.4
Input Leakage Current
Input Duty Cycle
IIN
dtin
VIN = VDD , VIN = GND
Measurement from differential wavefrom
-5
40
Input Jitter - Cycle to Cycle JDIFIn
Differential Measurement
1 Guaranteed by design and characterization, not 100% tested in production.
2Slew rate measured through +/-75mV window centered around differential zero
0
MAX
900
8
5
60
125
UNITS NOTES
mV 1
mV
V/ns
uA
%
ps
1
1,2
1
1
REVISION D 03/28/16
5 7-OUTPUT 1.8V HCSL FANOUT BUFFER
5 Page 
9DBV0731 DATASHEET
SMBus Table: Output Enable Register 1
Byte 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DIF OE5
DIF OE4
DIF OE3
DIF OE2
DIF OE1
DIF OE0
Control Function
Output Enable
Output Enable
Reserved
Output Enable
Output Enable
Output Enable
Reserved
Output Enable
Type
RW
RW
RW
RW
RW
RW
0
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
Low/Low
1. A low on these bits will overide the OE# pin and force the differential output Low/Low
SMBus Table: PLL Operating Mode and Output Amplitude Control Register
Byte 1
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DIF OE6
AMPLITUDE 1
AMPLITUDE 0
Control Function
Reserved
Reserved
Output Enable
Reserved
Reserved
Reserved
Controls Output Amplitude
Type
RW
RW
RW
0
Low/Low
00 = 0.6V
10= 0.8V
1. A low on the DIF OE bit will overide the OE# pin and force the differential output Low/Low
SMBus Table: DIF Slew Rate Control Register
Byte 2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SLEWRATESEL DIF5
SLEWRATESEL DIF4
SLEWRATESEL DIF3
SLEWRATESEL DIF2
SLEWRATESEL DIF1
SLEWRATESEL DIF0
Control Function
Adjust Slew Rate of DIF5
Adjust Slew Rate of DIF4
Reserved
Adjust Slew Rate of DIF3
Adjust Slew Rate of DIF2
Adjust Slew Rate of DIF1
Reserved
Adjust Slew Rate of DIF0
Type
RW
RW
RW
RW
RW
RW
0
Slow Setting
Slow Setting
Slow Setting
Slow Setting
Slow Setting
Slow Setting
SMBus Table: DIF Slew Rate Control Register
Byte 3
Name
Control Function
Bit 7
Bit 6
Bit 5
Reserved
Reserved
Reserved
Bit 4
Reserved
Bit 3
Bit 2
Bit 1
Bit 0
SLEWRATESEL DIF6
Reserved
Reserved
Reserved
Adjust Slew Rate of DIF6
Type
RW
0
Slow Setting
Byte 4 is Reserved and reads back 'hFF
1
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
OE# pin control
Default
1
1
1
1
1
1
1
1
1
OE# pin control
01 = 0.7V
11 = 0.9V
Default
0
1
1
0
1
1
1
0
1
Fast Setting
Fast Setting
Fast Setting
Fast Setting
Fast Setting
Fast Setting
Default
1
1
1
1
1
1
1
1
1
Fast Setting
Default
1
1
0
0
0
1
1
1
REVISION D 03/28/16
11 7-OUTPUT 1.8V HCSL FANOUT BUFFER
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet 9DBV0731.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 9DBV0731 | 7-output 1.8V HCSL Fanout Buffer | IDT |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |