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AD6255A 반도체 회로 부품 판매점

Class-D Audio Power Amplifier



ESMT 로고
ESMT
AD6255A 데이터시트, 핀배열, 회로
ESMT
AD6255A
Class-D Audio Power Amplifier with USB / I2S Interface and
Recording function
Features
z Compliant with USB S pecification v1.1, and USB
2.0 full speed
z Embedded high efficiency, high performance class
D stereo amplifier
z Support I2S input and I2S output interface of
master mode
Sampling frequencies(Fs)48kHz
z +6dB enhancement(Theater function)
z Support recording function
z Support both bus-powered and self-powered
operation
z Supports Win Me//2000/XP and MacOS
z True plug-and-play application, no driver is
required for basic USB speaker application
z Support volume/mute control with external button
z Built-in 5V to 3.3V regulator for internal device
operation
z Total efficiency
80% for 8load @ -1dB 1kHz sine wave input
z Loudspeaker PSNR & DR (A-weighting)
80dB (PSNR), 78dB (DR) with Bead filter
82dB (PSNR), 78dB (DR) with Chock filter
z Anti-pop design
z Over-temperature protection
z Under-voltage shutdown
z Short-circuit detection
z 12 MHz Crystal Input
z 32-pin LQFP(Pb free)
Description
AD6255A is a single chip of Class-D audio
amplifier with USB/I2S interface an d sup ports
recording function. When using the po wer supplied
from the USB port, AD6 255A can drive a pair of u p
to 1W spe akers d ue to the built-in, hig h ef ficiency
and hig h p erformance class D am plifiers. Th e
device also has an I2S input port and I2S output port.
The I 2S input port allo ws oth er ex ternal a udio
sources t o u se t he cla ss D amplif ier t o sha re t he
speakers. Th e I 2S output port allows other high
performance audio device (i.e. AD8356A/AD8256A)
to be controlled by AD6255A.
Functional Block Diagram
Elite Semiconductor Memory Technology Inc.
Publication Date: Apr. 2007
Revision: 1.3
1/15
http://www.Datasheet4U.com


AD6255A 데이터시트, 핀배열, 회로
ESMT
Pin Assignment
AD6255A
Pin Description
Pin Name Type
1 MSDA
I/O
2 MSCL
O
3 PDO
O
4 SDA TAO O
5 LRCIN
O
6 BCLK
O
7 SDATAI
I
8 MCLK
O
9 GNDR
P
10 RB
O
11 RA
O
12 VDDR
P
13 VDDL
P
14 LA
O
15 LB
O
Description
I2C’s SDA of Master mode
I2C’s SCL of master mode
Power-down output (Note1)
Serial audio output (Note1)
L/R clock output(Fs) (Note1)
BCLK output(64xFs) (Note1)
Serial audio data input
Master clock(256xFs)
Ground for right channel
Right channel output-
Right channel output+
Supply for right channel
Supply for left channel
Left channel output+
Left channel output-
Elite Semiconductor Memory Technology Inc.
Characteristics
Schmitt trigger TTL input buffer
Schmitt trigger TTL input buffer
Publication Date: Apr. 2007
Revision: 1.3
2/15




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AD6255A amplifier

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