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U4083B-AFPG3 반도체 회로 부품 판매점

Low-Power Audio Amplifier for Telephone Applications



TEMIC Semiconductors 로고
TEMIC Semiconductors
U4083B-AFPG3 데이터시트, 핀배열, 회로
U4083B
Low-Power Audio Amplifier for Telephone Applications
Description
The integrated circuit, U4083B, is a low power audio
amplifier for a telephone loudspeaker. It has differential
speaker outputs to maximize the output swing at low
supply voltages. There is no need for coupler capacitors.
The U4083B has an open loop gain of 80 dB whereas the
closed loop gain is adjusted with two external resistors. A
chip disable pin permits powering down and/or muting
the input signal.
Features
D Wide operating voltage range: 2 to 16 V
D Battery powered application due to low quiescent
supply current: 2.7 mA typical
D Chip disable input to power down the integrated
circuit
D Low power down quiescent current
D Drives a wide range of speaker loads
WD Output Power, Po = 250 mW @ RL = 32 (speaker)
D Low harmonic distortion (0.5% typical)
D Wide range gain adjustable: 0 dB to 46 dB
Benefits
D Low number of external components
D Low current consumption
Block Diagram / Application Circuit
Input
75 k W
0.1mF Ri
Ci 3 kW
Rf
4
Vi
FC1 3
1mF C1
5mF
2
C2 FC2
50 kW
125 kW
50 kW
Amp.1
+
4 kW
4 kW
+ Amp.2
Bias
circuit
VS
6
5
VO1
8
VO2
1
CD
93 7781 e
Figure 1.
7 GND
Order Information
Extended Type Number
U4083B-AFP
U4083B-AFPG3
Package
SO8
SO8
Remarks
Taped and reeled
TELEFUNKEN Semiconductors
Rev. A2, 07-Apr-97
Preliminary Information
1 (11)


U4083B-AFPG3 데이터시트, 핀배열, 회로
U4083B
Pin Description
CD 1
8 VO2
FC2 2
FC1 3
7 GND
6 VS
Vi 4
5 VO1
94 8022
Figure 2. Pinning
Pin Symbol
Function
1 CD Chip disable
2 FC2 Filtering, power supply rejection
3 FC1 Filtering, power supply rejection
4 Vi Amplifier input
5 VO1 Amplifier output 1
6 VS Voltage supply
7 GND Ground
8 VO2 Amplifier output 2
Functional Description
Including External Circuitry
*Pin 1: Chip disable digital input (CD)
Pin 1 (chip disable) is used to power down the IC to con-
serve power or muting or both.
WInput impedance at pin 1 is typically 90 k .
Logic 0 < 0.8 V IC enabled (normal operation)
Logic 1 > 2 V IC disabled
Figure 15 shows power supply current diagram. The
change in differential gain from normal operation to
muted operation (muting) is more than 70 dB.
Switching characteristics are as follows:
turn-on time
turn-off time
v mton = 12 to 15 ms
toff 2 s
They are independent of C1, C2 and VS.
Voltages at Pins 2 and 3 are supplied from VS and there-
fore do not change when the U4083B is disabled.
Outputs– VO1 (Pin 5) and VO2 (Pin 8) –turn to a high im-
pedance condition by removing the signal from the
speaker.
When signals are applied from an external source to the
outputs (disabled), they must not exceed the range be-
tween the supply voltage, Vs, and Ground.
Pins 2 and 3: Filtering, power supply rejection
Power supply rejection is provided by capacitors C1 and
C2 at Pin 3 and Pin 2, respectively. C1 is dominant at high
frequencies whereas C2 is dominant at low frequencies
(figures 4 to 7). Values of C1 and C2 depend on the
conditions of each application. For example, a line
powered speakerphone (telephone amplifier) will require
more filtering than a system powered by regulated power
supply.
The amount of rejection is a function of the capacitors and
the equivalent impedance looking into Pin 3 and Pin 2
(see electrical characteristic equivalent resistance, R).
Apart from filtering, capacitors C1 and C2 also influence
the turn-on time of the circuit at power-up since capaci-
Wtors are charged up through the internal resistors (50 k
Wand 125 k ) as shown in the block diagram.
Figure 1 shows turn-on time versus C2 at VS = 6 V, for two
different C1 values.
Turn-on time is 60% longer when VS = 3 V and 20%
mshorter when VS = 9 V.
Turn-off time is less than 10 s
Pin 4: Amplifier input Vi
Pin 5: Amplifier output 1 VO1
Pin 8: Amplifier output 2 VO2
wThere are two identical operational amplifiers. Amp.1 has
an open loop gain 80 dB at 100 Hz (figure 2), whereas
the closed loop gain is set by external resistors, Rf and Ri
(figure 3). The amplifier is unity gain stable, and has a
unity gain frequency of approximately 1.5 MHz. A closed
loop gain of 46 dB is recommended for a frequency range
of 300 to 3400 Hz (voice band). Amp.2 is internally set
to a gain of –1.0 (0 dB). The outputs of both amplifiers are
capable of sourcing and sinking a peak current of 200 mA.
Output voltage swing is between 0.4 V and Vs – 1.3 V at
maximum current (figures 18 and 19).
The output dc offset voltage between Pins 5 and 8 (VO1
– VO2) is mainly a function of the feedback resistor, Rf,
because the input offset voltage of the two amplifiers
generally neutralize each other.
Bias current of Amp. 1 which is constant with respect to
Vs, however flows out of Pin 4 (Vi) and through Rf,
forcing V01 to shift negative by an amount equal to Rf IIB
and VO2 positive to an equal amount.
The output offset voltage specified in the electrical char-
acteristics is measured with the feedback resistor
W(Rf = 75 k ) shown in typical application circuit. It takes
into account bias current as well as internal offset voltages
of the amplifiers.
2 (11)
TELEFUNKEN Semiconductors
Preliminary Information
Rev. A2, 07-Apr-97




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Low-Power Audio Amplifier for Telephone Applications - TEMIC Semiconductors